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From 3-D MOSFETs to 2-D Tunnel FETs: New material systems & new device applications

Speaker: 
Aaron Thean (Department of Electrical & Computer Engineering, NUS)
Date: 
Thu, 15/09/2016 - 2:00pm to 3:00pm
Location: 
CA2DM Theory Common (S16-06)
Host: 
Oezyilmaz Barbaros
Event Type: 
Seminars

Abstract

As the industry scales deep into the the sub-10nm technology nodes in the next decade, the need to maintain chip-level energy budget with increasing circuit density motivates the search for new materials and new transistor technologies. As the industry explores beyond Silicon materials for transistors, there are enormous recent learning on how 3-D materials like III-V and Ge bring advantages over traditional silicon, as well as new challenges. As devices with these novel materials are scaled into sub deca-nanometer dimensions, issues due to low channel density of states, narrow band-gap, and defects become major limitations. At the same time, the need for a ultra low-energy switch for low operating supply voltage, prompts us to investigate steep-subthreshold swing devices like tunnel FETs (TFETs). In turn, requiring us to integrate novel heterostructures to enable more effective tunnel junctions. However, this also highlighted new detractors like interface defects.

With the advent of 2-D crystals of Transition Metal Dichalcogenides (TMDs) and their 2-D Van Der Waal (VdW) Heterostructures, new possibilities in tunnel juctions for TFETs are revealed.  In this talk, we will first discuss the challenges of scaling 3D semiconductor from MOSFETs to TFETs. We will then look at how 2-D TMDs may address these issues, while bringing new challenges. In addition, we will review challenges related to large-area growth of TMDs and possibilities for new logic technology applications.

Speaker details

Aaron Voon-Yew Thean is a Professor of Electrical and Computer Engineering at the National University of Singapore. He is also a consulting Fellow to IMEC, a Nano-electronic Research Center, based in Belgium. Prior to joining NUS in 2016, Aaron served as IMEC’s Vice President of Logic Technologies Research and the Director of the Logic Devices Research. Working with major industry partners like Intel, TSMC, Samsung, Globalfoundries, Qualcomm, he directed the research and development of advanced materials, device, and design technologies ranging from 7nm to Beyond CMOS technologies, 2-D materials to Spintronics.  Before joining imec in 2011, he worked at Qualcomm Inc. San Diego, CA USA, IBM-New York, and Motorola-Austin Texas.  Aaron graduated in 2001 from the University of Illinois at Champaign-Urbana, USA, where he received his B.Sc. (Highest Honors), M.Sc., and Ph.D.  in Electrical Engineering. He has published over 300 technical papers and holds more than 50 U.S. patents. He is also serving as an Editor of the IEEE Electron Device Letters. Among his notable recognitions include the 2014 Compound Semiconductor Industry Innovation award, Best R&D Collaboration Award from Samsung Electronics, and 2010 Young Alumni Achievement Award UIUC. Most recently, Aaron has been recognized by NRF as a Returning Singaporean Scientist.

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